D latch and D flip-flop circuits using floating-gate MOS are designed. In order to introduce the application of D flip-flop, we design the register and counter by D flip-flops. 提出了基于浮栅MOS器件的D锁存器以及D触发器的电路设计,并以寄存器和计数器为例,介绍了D触发器的应用。
The Design of Arbitrary Value Flip-Flop Circuit and Register 任意值触发器电路与寄存器的设计
CMOS Flip-flop Suitable to Ternary Linear Feedback Shift Register 适用于三值线性反馈移位寄存器的CMOS触发器
And a novel structure is adopted for D-type flip-flop in successive approximation register ( SAR). 转换器的SAR寄存器结构采用了一种新的结构来实现D触发器。
Abundant flip-flop resource of FPGA made it possible to design survival path exchange register module. The solution decreased complexity of decoder control process as increased speed of decoder. 方案中设计了幸存路径交换寄存器模块,充分利用FP-GA中丰富的触发器资源,减小了译码器状态控制的复杂度,提高了VB译码器的运行速度。